dal-c library ← coverage

§ Coverage

src/sc_sched.c

1/*2 * sc_sched.c -- implementation. Blocks are tagged with the low-level3 * requirement they satisfy; see requirements/sc_sched.md.4 */5#include "sc_sched.h"677sc_status_t sc_sched_config_valid(const sc_sched_config_t *cfg)8{97    sc_status_t status = SC_OK;10117    if ((cfg == NULL) || (cfg->slots == NULL))condition outcomes covered 4/412    {132        status = SC_ERR_NULL;                        /* LLR-SCH-6 */14    }155    else if (cfg->n == 0u)condition outcomes covered 2/216    {171        status = SC_ERR_PARAM;                       /* LLR-SCH-7 */18    }19    else20    {21        uint16_t i;2210        for (i = 0u; i < cfg->n; i++)                /* LLR-SCH-8 */condition outcomes covered 2/223        {246            const sc_sched_slot *s = &cfg->slots[i];256            if (s->run == NULL)condition outcomes covered 2/226            {271                status = SC_ERR_NULL;28            }295            else if ((s->period == 0u) || (s->phase >= s->period))condition outcomes covered 4/430            {312                status = SC_ERR_PARAM;32            }33            else34            {35                /* slot ok */36            }37        }38    }39407    return status;41}42434sc_status_t sc_sched_init(sc_sched_state_t *state)44{45    sc_status_t status;46474    if (state == NULL)condition outcomes covered 2/248    {491        status = SC_ERR_NULL;                        /* LLR-SCH-5 */50    }51    else52    {533        state->tick = 0u;                            /* LLR-SCH-1 */543        status = SC_OK;55    }56574    return status;58}596018uint32_t sc_sched_tick(const sc_sched_config_t *cfg,61                       sc_sched_state_t *state,62                       void *ctx)63{6418    uint32_t ran = 0u;656618    if ((cfg == NULL) || (state == NULL))condition outcomes covered 4/467    {682        ran = 0u;                                    /* LLR-SCH-4 */69    }70    else71    {72        uint16_t i;7364        for (i = 0u; i < cfg->n; i++)                /* LLR-SCH-2: table order */condition outcomes covered 2/274        {7548            const sc_sched_slot *s = &cfg->slots[i];7648            if ((state->tick % s->period) == s->phase) /* LLR-SCH-3: due? */condition outcomes covered 2/277            {7829                s->run(ctx);7929                ran++;80            }81        }8216        state->tick++;                               /* LLR-SCH-9: advance */83    }848518    return ran;86}